Low Power Digital Design using Asynchronous Logic: Moving towards clock-less design - Sathish Vimalraj Antony Jayasekar
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The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on ... Full description
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Description
The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on obtaining low power by implementing asynchronous logic.
More Information
| Author | Sathish Vimalraj Antony Jayasekar |
|---|---|
| Publisher | LAP LAMBERT Academic Publishing |
| Release year | 2011 |
| Cover type | Softcover |
| EAN | 9783846518441 |