Writing Testbenches using SystemVerilog - Janick Bergeron
-30% with code BOOKS
Shipping in 12-18 days
30-day return policy
If you survey hardware design groups, you will learn that between 60% and 80% of their effort is dedicated to verification. This may seem unusually large, but I include in "verification" all debugging and correctness checking activities, not just writing and running testbenches. Every time a hardware designer pulls up a waveform viewer, he or she performs a verification task. With today¿s ASIC and FPGA size ... Full description
You May Also Like
TOP
INCOSE Systems Engineering Handbook
-30% with code BOOKS
In stock at our supplier
TOP
If Anyone Builds It, Everyone Dies: The Case Against Superintelligent AI
Eliezer Yudkowsky, Nate Soares
-30% with code BOOKS
In stock at our supplier
TOP
The Design of Everyday Things
-30% with code BOOKS
In stock at our supplier
TOP
Open Circuits: The Inner Beauty of Electronic Components
Eric Schlaepfer, Windell Oskay
-30% with code BOOKS
In stock at our supplier
TOP
Get started with MicroPython on Raspberry Pi Pico: The Official Raspberry Pi Pico Guide
-30% with code BOOKS
In stock at our supplier
TOP
We Are Not Machines: The Fight for the Future of Work
-30% with code BOOKS
In stock at our supplier
TOP
Foundations of Flavor: The Noma Guide to Fermentation: Including Step-By-Step Information on Making and Cooking with: Koji, Kombuchas, Shoyus, Misos, Vinegars, Garums, Lacto-Ferments and black Fruits Vegetables
-30% with code BOOKS
In stock at our supplier
TOP
Nucleo Boards Programming with the STM32CubeIDE: Hands-on in more than 50 projects
-30% with code BOOKS
In stock at our supplier
TOP
Data-Driven Science and Engineering: Machine Learning, Dynamical Systems, and Control
Steven L. Brunton, J. Nathan Kutz
-30% with code BOOKS
In stock at our supplier
TOP
Black Holes: The Key to Understanding the Universe
-30% with code BOOKS
In stock at our supplier
TOP
Practical Electronics for Inventors
-30% with code BOOKS
In stock at our supplier
TOP
Flowers For Algernon: A Modern Literary Classic
-30% with code BOOKS
In stock at our supplier
TOP
Human Compatible: Artificial Intelligence and the Problem of Control
-30% with code BOOKS
Out of stock
TOP
How To Read Water: Clues & Patterns from Puddles to the Sea
-30% with code BOOKS
In stock at our supplier
TOP
Make: Electronics: Learning by Discovery: A hands-on primer for the new electronics enthusiast
-30% with code BOOKS
In stock at our supplier
TOP
Mastering the Arduino Uno R4: Programming and Projects for the Minima and WiFi
-30% with code BOOKS
In stock at our supplier
TOP
The Idea Factory: Bell Labs and the Great Age of American Innovation
-30% with code BOOKS
In stock at our supplier
TOP
Fundamentals of Aerodynamics ISE
Christopher Cadou, John D. Anderson
-30% with code BOOKS
In stock at our supplier
TOP
Foundation Design and Construction
-30% with code BOOKS
In stock at our supplier
Description
If you survey hardware design groups, you will learn that between 60% and 80% of their effort is dedicated to verification. This may seem unusually large, but I include in "verification" all debugging and correctness checking activities, not just writing and running testbenches. Every time a hardware designer pulls up a waveform viewer, he or she performs a verification task. With today¿s ASIC and FPGA sizes and geometries, getting a design to fit and run at speed is no longer the main challenge. It is to get the right design, working as intended, at the right time. Unlike synthesizable coding, there is no particular coding style nor language required for verification. The freedom of using any l- guage that can be interfaced to a simulator and of using any features of that language has produced a wide array of techniques and approaches to verification. The continued absence of constraints and historical shortage of available expertise in verification, c- pled with an apparent under-appreciation of and under-investment in the verification function, has resulted in several different ad hoc approaches. The consequences of an informal, ill-equipped and understaffed verification process can range from a non-functional design requiring several re-spins, through a design with only a s- set of the intended functionality, to a delayed product shipment.
More Information
| Author | Janick Bergeron |
|---|---|
| Publisher | Springer US |
| Release year | 2010 |
| Cover type | Softcover |
| EAN | 9781441939784 |